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1 12mhz rail-to-rail input-output operational amplifier el5120t the el5120t is a high voltage rail-to-rail input-output amplifier with low power consumption. the el5120t is a single amplifier that exhibits beyond the rail inpu t capability, rail-to-rail output capability, and is unity gain stable. the operating voltage range is from 4.5v to 19v. it can be configured for single or dual supply operation, and typically consumes only 750a. the el5120t has an output short circuit capability of 200ma and a contin uous output current capability of 70ma. the el5120t features a slew rate of 12v/s. also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 12mhz (-3db). this enables the amplifier to offer maximum dynamic range at any supply voltage. these features make the el5120t an ideal amplifier solution for use in tft-lcd panels as a v com or static gamma buffer, and in high speed filtering and signal conditioning applications. other applications include battery power and portable devices, especially where low power consumption is important. the el5120t is available in small 5 ld tsot package. it features a standard operational amplifier pinout. the device operates over an ambient temperature range of -40c to +85c. features ? 750a supply current ? 12mhz (-3db) bandwidth ? 4.5v to 19v maximum supply voltage range ? 12v/s slew rate ? 70ma continuous output current ? 200ma output short circuit current ? unity-gain stable ? beyond the rails input capability ? rail-to-rail output swing ? built-in thermal protection ? -40c to +85c ambient temperature range ? pb-free (rohs compliant) applications ? tft-lcd panel - tablet, monitor, notebook -v com amplifier, static gamma buffer, panel repair ? electronic notebooks, games ?touch-screen displays ? personal communication device s, digital assistants (pda) ? portable instrumentation ? sampling adc amplifiers ? wireless lans ?office automation ? active filters ?adc/dac buffer figure 1. typical tft-lcd v com application figure 2. frequency response for various r l +15v 4.7f 0.1f tft-lcd panel vout vs+ + el5120t +15v 0 vs- vin+ vin- panel load -15 -10 -5 0 5 100k 1m 10m 100m frequency (hz) normalized gain (db) 1k ? 560 ? 150 ? v s = 5v a v = 1 c l = 8pf 10k ? caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2012. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. september 27, 2012 fn6895.0
el5120t 2 fn6895.0 september 27, 2012 pin configuration el5120t (5 ld tsot) top view 1 2 3 5 4 - + vin+ vs- vout vin- vs+ pin descriptions pin number pin name function equivalent circuit 1 vout amplifier output (reference ?circuit 1?) 2 vs- negative power supply 3 vin+ amplifier non-inverting input (reference ?circuit 2?) 4 vin- amplifier inverting input (reference ?circuit 2?) 5 vs+ positive power supply v s+ gnd v s- circuit 1 v s+ v s- circuit 2 v out v in ordering information part number (notes 2, 3) part marking package (pb-free) pkg. dwg. # EL5120TIWTZ-T7 (note 1) besa 5 ld tsot mdp0049 notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std-020. 3. for moisture sensitivity level (msl), please see device information page for el5120t . for more information on msl please see techbrief tb363 .
el5120t 3 fn6895.0 september 27, 2012 important note: all parameters having min/max specifications are guaranteed. typ values are for information purposes only. unles s otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a absolute maximum ratings (t a = +25c) thermal information supply voltage between v s + and v s -. . . . . . . . . . . . . . . . . . . . . . . . . +19.8v input voltage range (v in+ , v in- ) . . . . . . . . . . . . . . . . . . . . . v s - - 0.5v, v s + + 0.5v input differential voltage (v in+ - v in- ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (v s + + 0.5v)-(v s - - 0.5v) maximum continuous output current . . . . . . . . . . . . . . . . . . . . . . . 70ma esd rating human body model (tested per jesd22-a114) . . . . . . . . . . . . . . . 4000v machine model (tested per jesd22-a115). . . . . . . . . . . . . . . . . . . . 300v charged device model (tested per jesd22-c101). . . . . . . . . . . . . 2000v latch up (tested per jesd78; class ii, level a) . . . . . . . . . . . . . . . . 100ma thermal resistance (typical) ja (c/w) jc (c/w) 5 ld tsot (notes 4, 5) 215 290 storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c ambient operating temperature . . . . . . . . . . . . . . . . . . . . . -40c to +85c maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150c power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . see figures 30 and 31 caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 5. for jc , the ?case temp? location is taken at the package top center. electrical specifications v s + = +5v, v s - = -5v, r l = 10k ? to 0v, t a = +25c, unless otherwise specified. parameter description conditions min (note 9) typ max (note 9) unit input characteristics v os input offset voltage v cm = 0v 5 18 mv tcv os average offset voltage drift (note 6) 5 v/c i b input bias current v cm = 0v 2 50 na r in input impedance 1g ? c in input capacitance 2pf cmir common-mode input range -5.5 +5.5 v cmrr common-mode rejection ratio for v in from -5.5v to +5.5v 50 75 db a vol open loop gain -4.5v v out + 4.5v 75 105 db output characteristics v ol output swing low i l = -5ma -4.94 -4.85 v v oh output swing high i l = +5ma 4.85 4.94 v i sc short circuit current v cm = 0v, source: v out short to v s -, sink: v out short to v s + 200 ma i out output current 70 ma power supply performance (v s +) - (v s -) supply voltage range 4.5 19 v i s supply current v cm = 0v, no load 750 950 a psrr power supply rejection ratio supply is moved from 2.25v to 9.5v 60 75 db dynamic performance sr slew rate (note 7) -4.0v v out + 4.0v, 20% to 80% 12 v/s t s settling to +0.1% (note 8) a v = +1, v out = 2v step, r l = 10k ? , c l = 8pf 500 ns bw -3db bandwidth r l = 10k ? , c l = 8pf 12 mhz
el5120t 4 fn6895.0 september 27, 2012 gbwp gain-bandwidth product a v = -50, r f = 5k ? , r g = 100 ? r l = 10k ? , c l = 8pf 8mhz pm phase margin a v = -50, r f = 5k ? , r g = 100 ? r l = 10k ? , c l = 8pf 50 electrical specifications v s + = +5v, v s - = -5v, r l = 10k ? to 0v, t a = +25c, unless otherwise specified. (continued) parameter description conditions min (note 9) typ max (note 9) unit electrical specifications v s + = +5v, v s - = 0v, r l = 10k ? to 2.5v, t a = +25c, unless otherwise specified. parameter description conditions min (note 9) typ max (note 9) unit input characteristics v os input offset voltage v cm = 2.5v 5 18 mv tcv os average offset voltage drift (note 6) 5 v/c i b input bias current v cm = 2.5v 2 50 na r in input impedance 1g ? c in input capacitance 2pf cmir common-mode input range -0.5 +5.5 v cmrr common-mode rejection ratio for v in from -0.5v to +5.5v 45 70 db a vol open loop gain 0.5v v oux + 4.5v 75 105 db output characteristics v ol output swing low i l = -2.5ma 30 150 mv v oh output swing high i l = +2.5ma 4.85 4.97 v i sc short circuit current v cm = 2.5v, source: v out short to v s -, sink: v out short to v s + 125 ma i out output current 70 ma power supply performance (v s +) - (v s -) supply voltage range 4.5 19 v i s supply current v cm = 2.5v, no load 750 950 a psrr power supply rejection ratio supply is moved from 4.5v to 19v 60 75 db dynamic performance sr slew rate (note 7) 1v v out 4v, 20% to 80% 12 v/s t s settling to +0.1% (note 8) a v = +1, v out = 2v step, r l = 10k ? , c l = 8pf 500 ns bw -3db bandwidth r l = 10k ? , c l = 8pf 12 mhz gbwp gain-bandwidth product a v = -50, r f = 5k ? , r g = 100 ? r l = 10k ? , c l = 8pf 8mhz pm phase margin a v = -50, r f = 5k ? , r g = 100 ? r l = 10k ? , c l = 8pf 50
el5120t 5 fn6895.0 september 27, 2012 electrical specifications v s + = +18v, v s - = 0v, r l = 10k ? to 9v, t a = +25c, unless otherwise specified. parameter descrip tion conditions min (note 9) typ max (note 9) unit input characteristics v os input offset voltage v cm = 9v 6 18 mv tcv os average offset voltage drift (note 6) 6 v/c i b input bias current v cm = 9v 2 50 na r in input impedance 1g ? c in input capacitance 2pf cmir common-mode input range -0.5 +18.5 v cmrr common-mode rejection ratio for v in from -0.5v to +18.5v 53 78 db a vol open loop gain 0.5v v out 17.5v 75 90 db output characteristics v ol output swing low i l = -9ma 120 150 mv v oh output swing high i l = +9ma 17.85 17.88 v i sc short circuit current v cm = 9v, source: v out short to v s -, sink: v out short to v s + 200 ma i out output current 70 ma power supply performance (v s +) - (v s -) supply voltage range 4.5 19 v i s supply current v cm = 9v, no load 900 1100 a psrr power supply rejection ratio supply is moved from 4.5v to 19v 60 75 db dynamic performance sr slew rate (note 7) 1v v out 17v, 20% to 80% 12 v/s t s settling to +0.1% (note 8) a v = +1, v out = 2v step, r l = 10k ? , c l = 8pf 500 ns bw -3db bandwidth r l = 10k ? , c l = 8pf 12 mhz gbwp gain-bandwidth product a v = -50, r f = 5k ? , r g = 100 ? r l = 10k ? , c l = 8pf 8mhz pm phase margin a v = -50, r f = 5k ? , r g = 100 ? r l = 10k ? , c l = 8pf 50 notes: 6. measured over -40c to +85c ambient operat ing temperature range. see the typical tcv os production distribution shown in the ?typical performance curves? on page 6. 7. typical slew rate is an average of the slew rates measured on the rising (20% to 80%) and the falling (80% to 20%) edges of t he output signal. 8. settling time measured as the time from when the output level crosses the final value on rising/falling edge to when the outp ut level settles within a 0.1% error band. the range of the error band is determined by: final value(v)[full scale(v)*0.1%] 9. compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
el5120t 6 fn6895.0 september 27, 2012 typical performance curves figure 3. input offset voltage distribution figure 4. input offset voltage drift (tsot) figure 5. input offset voltage vs temperatur e figure 6. input bias current vs temperature figure 7. output high voltage vs temperature figure 8. output low voltage vs temperature 0 100 200 300 400 500 -10-8-6-4-2 0 4 6 10 input offset voltage (mv) quantity (amplifiers) typical production distribution 28 v s = 5v t a = +25c no load v cm = 0.5 x v s input offset voltage drift (|v|/c) quantity (amplifiers) 0 5 10 15 20 25 30 35 40 45 0 2 4 6 8 10 12 14 16 18 20 22 24 26 v s = 5v t a = -40c to 85c no load v cm = 0.5 x v s 0.0 2.5 5.0 7.5 10.0 -50 0 50 100 150 temperature (c) input offset voltage (mv) v s = 5v -1 0 1 2 3 4 5 -50 0 50 100 150 input bias current (na) v s = 5v temperature (c) 4.88 4.89 4.90 4.91 4.92 4.93 4.94 -50 0 50 100 150 temperature (c) output high voltage (v) v s = 5v i l = +2.5ma -4.96 -4.95 -4.94 -4.93 -4.92 -4.91 -4.90 -50 0 50 100 150 temperature (c) output low voltage (v) v s = 5v i l = -2.5ma
el5120t 7 fn6895.0 september 27, 2012 figure 9. open-loop gain vs temperatur e figure 10. slew rate vs temperature figure 11. supply current vs temperature fig ure 12. supply current vs supply voltage figure 13. slew rate vs supply voltage figur e 14. open loop gain and phase vs frequency typical performance curves (continued) 40 60 80 100 120 140 -50 0 50 100 150 open loop gain (db) temperature (c) v s = 5v r l = 10k ? 11.0 11.5 12.0 12.5 13.0 -50 0 50 100 150 slew rate (v/s) temperature (c) v s = 5v r l = 10k ? 710 730 750 770 790 -50 0 50 100 150 temperature (c) supply current (a) v s = 5v no load v cm = 0.5 x v s av = +1 600 700 800 900 1000 4 8 12 16 20 supply voltage (v) supply current (a) v s = 5v t a = +25c no load v cm = 0.5 x v s av = +1 8 10 12 14 16 4 6 8 1012141618 20 t a = +25c a v = 1 r l = 10k ? c l = 8pf slew rate (v/s) supply voltage (v) -20 0 20 40 60 80 100 10 100 1k 10k 100k 1m 10m 100m frequency (hz) open loop gain (db) -50 0 50 100 150 200 250 phase () v s = 5v t a = +25c r l = 10k ? c l = 8pf phase gain
el5120t 8 fn6895.0 september 27, 2012 figure 15. frequency response for various r l figure 16. frequency response for various c l figure 17. closed loop output impedance vs frequency figure 18. maximum output swing vs frequency figure 19. cmrr vs frequency figure 20. psrr vs frequency typical performance curves (continued) -15 -10 -5 0 5 100k 1m 10m 100m normalized gain (db) frequency (hz) 1k ? 560 ? 150 ? v s = 5v a v = 1 c l = 8pf 10k ? -15 -10 -5 0 5 10 15 20 100k 1m 10m 100m 8pf 50pf 100pf frequency (hz) normalized gain (db) v s = 5v a v = 1 r l = 10k ? 1000pf 0.01 0.1 10 100 1000 10 1k 100k 1m 100m frequency (hz) v s = 5v r f = 2kv ? r g = 1k ? r l = 450 ? source = 0dbm output impedance ( ? ) 1 0 2 4 6 8 10 12 10k 100k 1m 10m frequency (hz) maximum output swing (v p-p ) v s = 5v t a = +25c a v = 1 r l = 10k ? c l = 8pf -80 -70 -60 -50 -40 -30 -20 -10 0 10 1k 100k 100m cmrr (db) frequency (hz) v s = 5v t a = +25c v in = -10dbm -80 -70 -60 -50 -40 -30 -20 -10 0 1k 10k 100k 1m 10m psrr (db) frequency (hz) v s = 5v t a = +25c
el5120t 9 fn6895.0 september 27, 2012 figure 21. input voltage noise spectral density vs frequency figure 22. total harmonic distortion + noise vs frequency figure 23. small signal overshoot vs load ca pacitance figure 24. step size vs settling time figure 25. large signal transient response figure 26. small signal transient response typical performance curves (continued) 1 10 100 1000 100 1k 10k 100k 1m 10m 100m frequency (hz) voltage noise (nv/ hz) t a = +25c 0.005 0.010 0.015 0.020 0.025 0.030 0.035 0.040 0.045 0.050 100 1k 10k 100k frequency (hz) thd+n (%) v s = 5v r l = 10k ? a v = 1 v in = 1.4v rms 0 20 40 60 80 100 10 100 1000 load capacitance (pf) overshoot (%) v s = 5v t a = +25c a v = 1 r l = 10k ? v in = 50mv -5 -4 -3 -2 -1 0 1 2 3 4 5 100 200 300 400 500 600 700 settling time (ns) step size (v) v s = 5v t a = +25c a v = 1 r l = 10k ? c l = 8pf 0.1% 0.1% 6v step v s = 5v t a = +25c a v = 1 r l = 10k ? c l = 8pf 1s/div 1v/div v s = 5v t a = +25c a v = 1 r l = 10k ? c l = 8pf 100mv step 50mv/div 200ns/div
el5120t 10 fn6895.0 september 27, 2012 figure 27. basic test circuit vin+ v out c l r l 49.9 v s- 4.7f 0.1f + r f vout vs- vin+ vs+ vin- 1 2 4 3 v s+ 4.7f 0.1f + 5 el5120t (5 ld tsot) r g
el5120t 11 fn6895.0 september 27, 2012 applications information product description the el5120t is a high voltage rail-to-rail input-output amplifier with low power consumption. the el5120t is a single amplifier which exhibits beyond the rail inpu t capability, rail-to-rail output capability, and is unity gain stable. the el5120t features a slew rate of 12v/s. also, the device provides common mode input capability beyond the supply rails, rail-to-rail output capability, and a bandwidth of 12mhz (-3db). this enables the amplifier to offer maximum dynamic range at any supply voltage. operating voltage, input and output capability the el5120t can operate on a single supply or dual supply configuration. the el5120t oper ating voltage ranges from a minimum of 4.5v to a maximum of 19v. this range allows for a standard 5v (or 2.5v) supply voltage to dip to -10%, or a standard 18v (or 9v) to rise by +5.5% without affecting performance or reliability. the input common-mode voltage range of the el5120t extends 500mv beyond the supply rails. also, the el5120t is immune to phase reversal. however, if the common mode input voltage exceeds the supply voltage by more than 0.5v, electrostatic protection diodes in the input stag e of the device begin to conduct. even though phase reversal will not occur, to maintain optimal reliability it is suggested to avoid input overvoltage conditions. figure 28 shows the input volt age driven 500mv beyond the supply rails and the device outp ut swinging between the supply rails. the el5120t output typically swings to within 50mv of positive and negative supply rails with load currents of 5ma. decreasing load currents will extend the output voltage range even closer to the supply rails. figure 29 show s the input and output waveforms for the device in a unity-gain conf iguration. operation is from 5v supply with a 10k ? load connected to gnd. the input is a 10v p-p sinusoid and the output voltage is approximately 9.9v p-p . refer to the ?electrical specifications? table beginning on page 3 for specific device parameters. parameter variations with operating voltage, loading and/or temperature are shown in the ?typical performance curves? beginning on page 6. output current the el5120t is capable of outp ut short circuit currents of 200ma (source and sink), and the device has built-in protection circuitry, which limits the outp ut current to 200ma (typical). to maintain maximum reliability, the continuous output current should never exceed 70ma. this 70ma limit is determined by the characteristics of the internal metal interconnects. also, see ?power dissipation? on page 12 for detailed information on ensuring proper device operation and reliability for temperature and load conditions. thermal shutdown the el5120t has a built-in thermal protection, which ensures safe operation and prevents internal damage to the device due to overheating. when the die temperature reaches +165c (typical), the device automatically shuts off the outputs by putting them in a high impedance state. when the die cools by +15c (typical), the device automa tically turns on the outputs by putting them in a low impedance (normal) operating state. figure 28. operation with beyond-the-rails input 1v/div v s = 2.5v, t a = +25c, a v = 1, v in = 6v p-p, r l = 10k ? to gnd input output 100s/div figure 29. operation with rail-to-rail input and output v s = 5v, t a = +25c, a v = 1, v in = 10v p-p, r l = 10k ? to gnd 5v/div input output 100s/div
el5120t 12 fn6895.0 september 27, 2012 driving capacitive loads purely capacitive loads on the el5120t should not exceed 1nf without appropriate output lo ad isolation or amplifier compensation techniques. as load capacitance increases, the -3db bandwidth will decrease and peaking can occur. depending on the application, it may be necessary to reduce peaking and to improve device stability. to improve device stability, a snubbe r circuit (compensation) or a series resistor (isolation) may be added to the output of the el5120t. a snubber is a shunt load consisting of a resistor in series with a capacitor. an optimized snubber can improve the phase margin and the stability of the el5120t. the advantage of a snubber circuit is that it does not draw any dc load current or reduce the gain. another method to reduce peaking is to add a series output resistor (typically between 1 to 10 ). depending on the capacitive loading, a small value resistor may be the most appropriate choice to minimize any reduction in gain. power dissipation with the high-output drive capabili ty of the el5120t amplifier, it is possible to exceed the +150c absolute maximum junction temperature under certain load current conditions. it is important to calculate the maximum power dissipation of the el5120t in the application. proper load conditions will ensure that the el5120t junction temperature stays within a safe operating region. the maximum power dissipation allowed in a package is determined according to equation 1: where: ?t jmax = maximum junction temperature ?t amax = maximum ambient temperature ? ja = thermal resistance of the package ?p dmax = maximum power dissipation allowed the total power dissipation produced by an ic is the total quiescent supply current times th e total power supply voltage, plus the power dissipation in the ic due to the load, or: when sourcing, and: when sinking, where: ?v s = total supply voltage ( v s + - v s - ) ?v s + = positive supply voltage ?v s - = negative supply voltage ?i smax = maximum supply current (i smax = el5120t quiescent current) ?v out = output voltage ?i load = load current device overheating can be avoided by calculating the minimum resistive load condition, r load , resulting in the highest power dissipation. to find r load set the two p dmax equations equal to each other and solve for v out /i load . reference the package power dissipation curves, figures 30 and 31, for further information. p dmax t jmax t amax ? ja -------------------------------------------- - = (eq. 1) p dmax v s i smax v ( s +v out ) i load ? + = (eq. 2) p dmax v s i smax v ( out v s - ) i load ? + = (eq. 3) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0 25 50 75 100 125 150 ambient temperature (c) power dissipation (w) figure 30. package power dissipation vs ambient temperature jedec jesd51-3 low effective thermal conductivity test board ja = +300c/w tsot5 417mw 85 figure 31. package power dissipation vs ambient temperature jedec jesd51-7 high effective thermal conductivity (4-layer) test board - exposed diepad soldered to pcb per jesd51-5 85 0.0 0.2 0.4 0.6 0.8 0 25 50 75 100 125 150 ambient temperature (c) power dissipation (w) ja = +215c/w tsot5 581mw
el5120t 13 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn6895.0 september 27, 2012 for additional products, see www.intersil.com/product_tree power supply bypassing and printed circuit board layout the el5120t can provide gain at high frequency, so good printed circuit board layout is necessary for optimum performance. ground plane construction is hi ghly recommended, trace lengths should be as short as possible and the power supply pins must be well bypassed to reduce any risk of oscillation. for normal single supply operation (the v s - pin is connected to ground) a 4.7f capacitor should be placed from v s + to ground, then a parallel 0.1f capacitor should be connected as close to the amplifier as possible. one 4.7f capacitor may be used for multiple devices. for dual supply operation the same capacitor combination should be placed at each supply pin to ground. products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog signal processing functions. go to www.intersil.com/products for a complete list of intersil product families. for a complete listing of applications, re lated documentation and related parts, plea se see the respective product information page. also, please check the product information page to ensure that you have the most updated datasheet: el5120t to report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff fits are available from our website at http://rel.intersil.com/reports/search.php revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest revision. date revision change september 27, 2012 fn6895.0 initial release.
el5120t 14 fn6895.0 september 27, 2012 tsot package family e1 n a d e 4 (n/2) 2 1 e1 0.15 d c 2x 0.25 c 2x n/2 tips e b ddd m d c a-b b nx 6 2 3 5 seating plane 0.10 c nx 1 3 c d 0.15 a-b c 2x a2 a1 h c (l1) l 0.25 4 4 gauge plane a mdp0049 tsot package family symbol millimeters tolerance tsot5 tsot6 tsot8 a 1.00 1.00 1.00 max a1 0.05 0.05 0.05 0.05 a2 0.87 0.87 0.87 0.03 b 0.38 0.38 0.29 0.07 c 0.127 0.127 0.127 +0.07/-0.007 d 2.90 2.90 2.90 basic e 2.80 2.80 2.80 basic e1 1.60 1.60 1.60 basic e 0.95 0.95 0.65 basic e1 1.90 1.90 1.95 basic l 0.40 0.40 0.40 0.10 l1 0.60 0.60 0.60 reference ddd 0.20 0.20 0.13 - n 5 6 8 reference rev. b 2/07 notes: 1. plastic or metal protrusions of 0.15mm maximum per side are not included. 2. plastic interlead protrusions of 0.15mm maximum per side are not included. 3. this dimension is measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994. 5. index area - pin #1 i.d. will be located within the indicated zone (tsot6 and tsot8 only). 6. tsot5 version has no center lead (shown as a dashed line).

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